This invention relates in general to transition detectors and relates more particularly to a circuit for generating a lock signal for synchronizing video horizontal and vertical synchronization signals with an alternating current power signal.
In the figures, each element indicated by a reference numeral will be indicated by the same reference numeral in every figure in which that element appears. The first two digits of any 4 digit reference numerals and the first digit of any two or three digit reference numerals indicates the first figure in which its associated element is presented.
A cathode ray tube (CRT) operates by directing a modulated beam of electrons across the face of a phosphor coated tube. The electron beam is scanned from left to right and from top to bottom in the same manner as one reads a page. When the beam is returned from right to left (referred to as a "horizontal retrace") or from bottom to top (referred to as a "vertical retrace"), the beam is blanked (i.e., turned off) so that it is not visible during any of these retrace operations. Thus, the electron beam is directed at the CRT along a ziz-zag pattern and is turned on only during the portions of the zig-zag pattern that slope from upper left to lower right. Upon completion of this zig-zag pattern, the beam returns to the upper left hand corner of the CRT and the zig-zag scanning process is repeated.
The signal that controls the return of the electron beam from the right to left is referred to as the "horizontal synch" signal. The signal that controls the return of the electron beam from the bottom to the top is referred to as the "vertical synch" signal. The number of times that this scanning process occurs per second is referred to as the "refresh rate" of the CRT. The refresh rate of a CRT is often selected to be a rational multiple of the frequency of an A.C. power signal provided to the CRT. For example, 60 Hertz and 30 Hertz refresh rates are common in the United States.
Unfortunately, when the refresh rate is nearly equal to a rational multiple of the A.C. power signal, a visual interference pattern on the CRT screen results in the form of a brightened band that repeatedly moves vertically across the CRT screen. The frequency at which this pattern scans vertically across the screen is equal to the frequency difference between the frequency of the A.C. power signal and that multiple of the refresh rate that most closely equals the frequency of the A.C. power signal. This effect is referred to as "swimming" and can be eliminated by phase locking the vertical synch signal to the A.C. power signal.
In some CRT video displays, a portion of the A.C. signal is directed through circuitry that reshapes this portion of the A.C. signal into a 60 Hz digital signal that conforms to the logic levels of the video display circuit. The horizontal and vertical signals are phase locked to this digital signal. As illustrated in FIG. 1, this digital signal can be produced by passing a portion of the A.C. power signal through a half wave rectifier 11 to produce an A.C. signal V that varies between 0 and 5 volts. This A.C. signal is applied to the clock input of a D-type flip flop 12 having its Q input connected to its D input. This produces at the Q output of the D-type flip-flop a digital output LOCK signal to which the vertical and horizontal synch signals can be locked.
Elements 11 and 12 cooperatively function as a transition detector that detects the zero-to-one transitions of the A.C. power signal. Unfortunately, power spikes in the A.C. line can produce spurious zero-to-one transitions that are detected by the zero-to-one detector, thereby producing in the output signal spurious pulses that disturb the phase lock between the vertical synch signal and the A.C. power signal. Such spikes often occur when motors are activated in devices connected into the same power circuit to which the video display is connected. Common sources of such motors include refrigerators, garbage disposals, and elevators. Some reduction in sensitivity to such power spikes has been achieved by use of a low pass filter in the input power line of a video display. However, to avoid spike-induced interruption of the phase lock between the digital LOCK signal and the vertical synch signal, it would be advantageous to have a zero-to-one detector that has a significantly reduced sensitivity to power spikes in the A.C. power signal.